1. Field of the Invention
The present invention relates to a semiconductor memory device, which is applied to, for example, a Read Only Memory (ROM), and the like.
2. Description of the Related Art
As for, for example, a Read Only Memory (ROM) among semiconductor memory devices, in a memory cell array thereof, ROM cells are arranged at intersection positions of a plurality of word lines and bit lines as memory cells.
At the time of a data readout operation, a bit line is first pre-charged to a predetermined voltage level. Subsequently, the selected bit line is discharged for a predetermined period of time, and a voltage of the selected bit line is determined, whereby the data of the memory cell is read (for example, Jpn. Pat. Appln. KOKAI Publication No. 6-36586).